29, Mirador, Irvine CA 92612
Tel: (949)-7250152 (Home)
of birth: January 19th, 1972
of Birth: Pavia,
Studies: @ Maturita’ Scientifica, Liceo Copernico, Pavia, July 1990 60/60 (High School)
@ Degree in electrical engineering (09/1990-03/1996)
University of Pavia, Italy 110/110
Summa Cum Laude (Master)
Average marks during degree in
electronic engineering: 29/30
@M.B.A. University of California, Irvine (09/1999-06/2002)
“Architectural study and project of basic building blocks for a
2 Ghz 2 V
Tutor: Prof. Rinaldo Castello
Publications: ESSCIRC (European Solid State Circuit Conference), England 1997
“A Low Voltage CMOS Downconversion Mixer for RF applications”,
Conta, Francesco Svelto,
“GSM/DCS tranceiver with integrated synthesiser”
Rahul Magoon, Akbar Ali, Matteo Conta et al
“A 27 mW fully integrated GPS radio in 035um CMOS”
Farbod Behbahani, Hamid Firouzouki, Matteo
Conta et al
Work: Position: RF Integrated Circuit Design Engineer IV, RF IC Design,
Conexant Systems, Newport Beach, CA 92660, (August 1996, October 2000)
Position: Senior Staff Engineer
Valence Semiconductor, Irvine, CA 92612, (October 2000, present)
20-100Mhz fully integrated
clock generation in 0.5um,
0.35um, 0.25um CMOS technology (production parts).
@ 600Mhz Fully Programmable Dual
Loop Frequency Synthesizer in 0.5um,
0.35um CMOS technology for CDMA cellular phones (production part).
@ 2Ghz/400Mhz BiCMOS Fully
Programmable Dual Frequency Synth
for GSM cellular phones (production part).
path of GSM/DCS tranceiver
@ Test chips for RF LC VCOs, prescalers, IQ generators, low jitter PLLs
Frequency Synthesizer in 0.35um,
0.35um CMOS technology (production part).
@WLAN 802.11 Tranceiver in
system analysis from OFDM Matlab to chip specs
responsible for SX, TX paths and top level chip integration
RF IC Design for Wireless Communication Systems, Lausann 1-5 July 1996.
@ 1997 IEEE International
Solid State Circuit Conference, San Francisco.
@ A lot of internal Conexant Talent Advancement Program courses
of 6 US patents in the area of low noise low power phase lock loops.
Skills: High frequency testing; CAD: CADENCE, HSPICE, ELDO, SPECTRE RF,
MATLAB, MATHCAD, MATHEMATICA, UNIX,
OFFICE, LOTUS NOTES, NETSCAPE …
Languages: Italian: mother tongue; English, French: understood, spoken, read.
Abroad: 1980-1982 France; 1996-present California, USA.